A configuration has been known that performs reception processing by means of direct discrete time sampling of a high-frequency signal with the aim of achieving small size and low power consumption of a receiver and integrating the analog signal processing section and digital signal processing section (see, for example, Non-Patent Literature 1 and Patent Literature 1).
FIG. 1 shows the overall configuration of a sampling circuit disclosed in Non-Patent Literature 1 and Patent Literature 1. FIG. 2 is a timing chart showing control signals inputted to the sampling circuit shown in FIG. 1. The sampling circuit shown in FIG. 1 performs frequency conversion on a received analog RF signal using a multi-tap direct sampling mixer to obtain a discrete time analog signal. To be more specific, electrical charge transfer between capacitors included in the sampling circuit in FIG. 1 realizes filter characteristics resulting in the product of an FIR (finite impulse response) filer and an IIR (infinite impulse response) filter. Characteristics around the passband are determined based on second-order IIR filter characteristics. FIGS. 3A and 3B show wideband frequency characteristics and an example of narrowed frequency characteristics in the sampling circuit in FIG. 1, nearby the passband.